Optimization of 14 nm double gate Bi-GFET for lower leakage current

In recent years, breakthroughs in electronics technology have resulted upgrades the physical properties of metal oxide semiconductor field effect transistor (MOSFET) toward smaller sizes and improvements both quality performance. Hence, growth (GFET) is being promoted as one worthy contenders due to its superior material characteristics. A 14 nm horizontal double-gate bilayer graphene FET with a high-k/metal gate proposed, which composed hafnium dioxide (HfO 2 ) tungsten silicide (WSi x respectively . It simulated modelled using silvaco ATHENA ATLAS computer-aided design (TCAD) tools, well Taguchi L9 orthogonal array (OA). The threshold voltage (V TH adjustment implant dose, V energy, source/drain (S/D) S/D energy all been investigated process parameters. While tilt angle noise factors. When compared initial findings before optimization, I OFF has value 29.579 nA/µm, indicating significant improvement. Findings from optimization technique demonstrate excellent device performance an 28.564 closer international roadmap (ITRS) 2013 target than before.